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general description the max8667/max8668 dual step-down converterswith dual low-dropout (ldo) linear regulators are intended to power low-voltage microprocessors or dsps in portable devices. they feature high efficiency with small external component size. the step-down converters are adjustable from 0.6v to 3.3v (max8668) or factory preset (max8667) with guaranteed output current of 600ma for out1 and 1200ma for out2. the 1.5mhz hysteretic-pwm control scheme allows for tiny external components and reduces no-load operating current to 100? with all outputs enabled. dual low-qui- escent-current, low-noise ldos operate down to 1.7v supply voltage. the max8667/max8668 have individ- ual enables for each output, maximizing flexibility. the max8667/max8668 are available in the space- saving, 3mm x 3mm, 16-pin thin qfn package. applications cell phones/smartphonespda and palmtop computers portable mp3 and dvd players digital cameras, camcorders pcmcia cards handheld instruments features ? tiny, thin qfn 3mm x 3mm package ? individual enables ? step-down converters 600ma guaranteed output current on out11200ma guaranteed output current on out2 tiny size 2.2? chip inductor (0805) output voltage from 0.6v to 3.3v (max8668) ultra-fast line and load transients low 25? supply current each ? ldos 300ma guaranteedlow 1.7v minimum supply voltage low output noise max8667/max8668 1.5mhz dual step-down dc-dc converters with dual ldos and individual enables ________________________________________________________________ maxim integrated products 1 1516 14 13 5 6 7 in34 out4 8 en3 lx2pgnd2 lx1 13 out1 (fb1) 4 12 10 9 en1en2 out2 (fb2)ref gnd en4 max8667max8668 out3 in12 2 11 pgnd1 thin qfn (3mm x 3mm) top view ( ) are for the max8668 pin configuration in34 lx2 lx1 out2 out1 2.6v to 5.5v out3out4 ref gnd in12 300ma 300ma en1en2 en3en4 600ma 1.2a pgnd1 pgnd2 10 f 4.7 f 4.7 f 4.7 f 0.01 f 2.2 h 2.2 h 2.2 f 2.2 f max8667 typical operating circuit 19-0784; rev 1; 7/07 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. evaluation kit available ordering information continued at the end of data sheet. selector guide appears at the end of data sheet. ordering information note: all max8667/max8668 parts are in a 16-pin, thin qfn, 3mm x 3mm package and operate in the -40? to +85? extended temperature range. + denotes a lead-free package. part pkg code top mark max8667 eteaa+ t1633-4 aeq max8667eteab+ t1633-4 afi max8667eteac+ t1633-4 afm max8667etecq+ t1633-4 afn downloaded from: http:///
max8667/max8668 1.5mhz dual step-down dc-dc converters with dual ldos and individual enables 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics(v in34 = v in12 = 3.6v, t a = -40? to +85?, unless otherwise noted. typical values are at t a = +25?.) (note 1) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. in12, in34, fb1, fb2, en1, en2, en3, en4, out1, out2, ref to gnd............................................-0.3v to +6.0v out3, out4 to gnd.....-0.3v to the lesser of + 6v or (v in34 + 0.3v) pgnd1, pgnd2 to gnd .......................................-0.3v to +0.3v lx1, lx2 current ..........................................................1.5a rms lx1, lx2 to gnd (note 1) .......................-0.3v to (v in12 + 0.3v) continuous power dissipation (t a = +70?) 16-pin, 3mm x 3mm thin qfn (derate 20.8mw/? above +70?) .............................1667mw operating temperature range ...........................-40? to +85? junction temperature ..................................................... +150? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? parameter conditions min typ max units in34 supply range v in12 v in34 1.7 5.5 v in12 supply range max8668, v in12 v in34 2.6 5.5 v in12 suppy range max8667, v in12 v in34 2.8 5.5 v t a = +25? 1 a shutdown supply current,i in12 + i in34 v in12 = v in34 = 4.2v v en_ = 0v t a = +85? 0.05 ? no load supply current,i in12 + i in34 max8667etejs+, all regulators enabled 100 150 ? undervoltage lockout v in12 rising 2.4 2.5 2.6 v in12 uvlo v in12 hysteresis 0.1 v v in34 rising 1.5 1.6 1.7 v in34 uvlo v in34 hysteresis 0.1 v thermal shutdown threshold t a rising +160 ? hysteresis 15 ? reference reference bypass outputvoltage 0.591 0.600 0.609 v ref supply rejection 2.6v (v in12 = v in34 ) 5.5v 0.15 mv/v logic and control inputs en_ input low level 1.7v v in34 5.5v 2.6v v in12 5.5v 0.4 v en_ input high level 1.7v v in34 5.5v 2.6v v in12 5.5v 1.44 v t a = +25? -1 +1 en_ input leakage current v in12 = v in34 = 5.5v t a = +85? 0.001 ? step-down converters minimum adjustable outputvoltage max8668 0.6 v note 1: lx_ has internal clamp diodes to gnd and in12. applications that forward bias these diodes should take care not to exceed the ic? package-dissipation limits. downloaded from: http:///
max8667/max8668 1.5mhz dual step-down dc-dc converters with dual ldos and individual enables _______________________________________________________________________________________ 3 note 1: all devices are 100% production tested at t a = +25?. limits over the operating temperature range are guaranteed by design. parameter conditions min typ max units maximum adjustable outputvoltage max8668 3.3 v t a = +25? 0.588 0.600 0.612 fb1, fb2 regulation voltage max8668, no load,v fb_ falling t a = -40? to +85? 0.582 0.600 0.618 v t a = +25? 1.274 1.300 1.326 out1, out2 regulation voltage max8667etejs+, no load, v out_ falling t a = -40? to +85? 1.261 1.300 1.339 v fb1, fb2 line regulation max8668, v in12 = 2.6v to 5.5v 0.01 %/v out1, out2 line regulation max8667, v in12 = 2.8v to 5.5v 0.05 %/v max8668, shutdown mode 0.1 fb1, fb2 bias current max8668, v fb1 = 0.5v 0.01 ? pmosfet switch (i limp1 ) 700 900 1100 out1 current limit nmosfet rectifier (valley current) 500 750 1000 ma pmosfet switch (i limp2 ) 1333 1667 2000 out2 current limit nmosfet rectifier (valley current) 1200 1500 1800 ma pmosfet switch, i lx1 = -400ma 0.3 0.6 out1 on-resistance nmosfet rectifier, i lx1 = 400ma 0.3 0.6 pmosfet switch, i lx2 = -400ma 0.12 0.27 out2 on-resistance nmosfet rectifier, i lx2 = 400ma 0.12 0.27 rectifier-off current threshold(i lxoff ) 60 120 ma t a = +25? -1 +1 lx leakage current lx_ = 5.5v t a = +85? 0.1 ? minimum on-time 100 ns minimum off-time 50 ns ldo regulators supply current each ldo 20 ? 1ma load, t a = +25? -1.5 +1.5 output-voltage accuracy 1ma to 300ma load -3.0 +3.0 % line regulation v in34 = 3.6v to 5.5v, 1ma load 0.003 %/v dropout voltage v in34 = 1.8v, 300ma load 130 250 mv current limit v out3 , v out4 90% of nominal value 375 420 465 ma soft-start ramp time to 90% of final value 0.1 ms output noise 100hz to 100khz, 30ma load, v out3 and v out4 = 2.8v 75 ? rms power-supply rejection ratio f < 1khz, 30ma load 57 db shutdown output resistance 1k timing (see figure 2) out1, out2 25 power-on time (t pwron ) out3, out4 45 ? out1, out2 15 enable time (t en ) out3, out4 35 ? electrical characteristics (continued)(v in34 = v in12 = 3.6v, t a = -40? to +85?, unless otherwise noted. typical values are at t a = +25?.) (note 1) downloaded from: http:///
max8667/max8668 1.5mhz dual step-down dc-dc converters with dual ldos and individual enables 4 _______________________________________________________________________________________ typical operating characteristics (v in12 = v in34 = 3.6v, circuit of figure 4, v out1 = 1.2v, v out2 = 1.8v, v out3 = 2.8v, v out4 = 2.8v, t a = +25?, unless otherwise noted.) out1 efficiency vs. load current (v out1 = 1.2v) max8667/88 toc01 load current (ma) efficiency (%) 10 1 10 20 30 40 50 60 70 80 90 0 0.1 1000 100 only out1 enabled out2 efficiency vs. load current (v out2 = 1.8v) max8667/88 toc02 load current (ma) efficiency (%) 1000 100 10 1 10 20 30 40 50 60 70 80 90 0 0.1 10000 only out2 enabled 0.80 0.900.85 1.051.00 0.95 1.201.15 1.10 1.25 0 200 100 300 400 500 600 out1 load regulation max8667/88 toc03 load current (ma) output voltage (v) 1.20 1.401.30 1.601.50 1.801.70 1.90 0 400 600 200 800 1000 1200 out2 load regulation max8667/88 toc04 load current (ma) output voltage (v) 1.00 1.05 1.10 1.15 1.20 1.25 1.30 1.35 1.40 2.5 3.5 3.0 4.0 4.5 5.0 5.5 out1 output voltage vs. input voltage (600ma load) max8667/88 toc05 input voltage (v) output voltage (v) 1.60 1.65 1.70 1.75 1.80 1.85 1.90 1.95 2.00 2.5 3.5 3.0 4.0 4.5 5.0 5.5 out2 output voltage vs. input voltage (1200ma load) max8667/88 toc06 input voltage (v) output voltage (v) 0 1000 500 20001500 30002500 3500 0 600 900 300 1200 1500 1800 switching frequency vs. load current max8667/88 toc07 load current (ma) switching frequency (khz) out2 out1 0 20 40 60 80 100 120 1.5 2.5 2.0 3.0 3.5 4.0 4.5 5.0 5.5 no-load supply current vs. supply voltage all regulator enabled max8667/88 toc08 supply voltage (v) supply current ( a) supply voltagerising supply voltagefalling 0 20 40 60 80 100 120 1.5 2.5 2.0 3.0 3.5 4.0 4.5 5.0 5.5 no-load supply current vs. supply voltage out1 and out2 only max8667/88 toc09 supply voltage (v) supply current ( a) supply voltagerising supply voltagefalling downloaded from: http:///
max8667/max8668 1.5mhz dual step-down dc-dc converters with dual ldos and individual enables _______________________________________________________________________________________ 5 0 4020 8060 100 120 012345 no-load supply current vs. supply voltage out3 and out4 only max8667/88 toc10 supply voltage (v) i in34 ( a) v in12 = 5.5v v in34 voltage rising v in34 voltage falling 2.50 2.652.60 2.55 2.70 2.75 2.80 2.85 2.90 2.95 3.00 2.5 3.5 3.0 4.0 4.5 5.0 5.5 out3 output voltage vs. input voltage (300ma load) max8667/88 toc11 input voltage (v) output voltage (v) 0 10 20 30 40 50 60 70 80 0 100 200 300 out3 dropout voltage vs. load current max8667/88 toc12 load current (ma) dropout voltage (mv) 0 300200 100 400 500 600 700 800 900 1000 2.5 3.5 3.0 4.0 4.5 5.0 5.5 supply current vs. supply voltage max8667/88 toc13 supply voltage (v) supply current (ma) in12 = in342.4 ? load on out1 3.6 ? load on out2 no load on out3no load on out4 40 s/div enable waveforms en1/en2/ en3/en4 v out1 v out2 5v/div2v/div 2v/div 2v/div 2v/div 2a/div 2a/div 2a/div max8667/88 toc14 v out4 i l1 v out3 i l2 i in12 + i in34 40 s/div shutdown waveforms en1/en2/ en3/en4 v out1 v out2 5v/div 1v/div 1v/div 1v/div 1v/div max8667/88 toc15 v out4 v out3 typical operating characteristics (continued) (v in12 = v in34 = 3.6v, circuit of figure 4, v out1 = 1.2v, v out2 = 1.8v, v out3 = 2.8v, v out4 = 2.8v, t a = +25?, unless otherwise noted.) 10 s/div out1 load transient v out1 i out1 100mv/div(ac-coupled) 200ma/div200ma/div max8667/88 toc16 i l1 300ma 10ma 10ma downloaded from: http:///
max8667/max8668 1.5mhz dual step-down dc-dc converters with dual ldos and individual enables 6 _______________________________________________________________________________________ 10 s/div out2 load transient v out2 i out2 200mv/div(ac-coupled) 500ma/div500ma/div max8667/88 toc17 i l2 600ma 10ma 10ma 10 s/div out3 load transient v out3 i out3 50mv/div(ac-coupled) 200ma/div max8667/88 toc18 300ma 0ma 0ma 10 s/div out4 load transient v out4 i out4 50mv/div(ac-coupled) 200ma/div max8667/88 toc19 300ma 0ma 0ma 10 s/div out1 light-load switching waveforms v out1 v lx1 i l1 20mv/div max8667/88 toc20 2v/div 100ma/div 500 a load 40 s/div out2 light-load switching waveforms v out2 v lx2 i l2 20mv/div max8667/88 toc21 2v/div 500ma/div 500 a load 400ns/div out1 heavy-load switching waveforms v out1 v lx1 i l1 20mv/div max8667/88 toc22 2v/div 500ma/div 500ma load typical operating characteristics (continued) (v in12 = v in34 = 3.6v, circuit of figure 4, v out1 = 1.2v, v out2 = 1.8v, v out3 = 2.8v, v out4 = 2.8v, t a = +25?, unless otherwise noted.) downloaded from: http:///
max8667/max8668 typical operating characteristics (continued) (v in12 = v in34 = 3.6v, circuit of figure 4, v out1 = 1.2v, v out2 = 1.8v, v out3 = 2.8v, v out4 = 2.8v, t a = +25?, unless otherwise noted.) 1.5mhz dual step-down dc-dc converters with dual ldos and individual enables _______________________________________________________________________________________ 7 1ms/div out3 noise max8667/88 toc25 100 v/div v out3 = 2.80v i load = 100 ? 1ms/div out4 noise max8667/88 toc26 100 v/div v out4 = 3.30v i load = 100 ? 400ns/div out2 heavy-load switching waveforms v out2 v lx2 i l2 20mv/div max8667/88 toc23 2v/div 500ma/div 500ma load 0 2010 4030 6050 70 0.01 1 0.1 10 100 1000 power-supply rejection ratio vs. frequency max8667/88 toc24 frequency (khz) psrr (db) v out3 = 2.80v i load = 100 ? c out3 = 4.7 f downloaded from: http:///
max8667/max8668 1.5mhz dual step-down dc-dc converters with dual ldos and individual enables 8 _______________________________________________________________________________________ pin description name pin max8667 max8668 function 1 en3 en3 enable input for regulator 3. drive en3 high or connect to in34 to turn on regulator 3. drive lowto turn off regulator 3 and reduce input quiescent current. 2 out3 out3 output of regulator 3. bypass out3 with a 4.7? ceramic capacitor to gnd. out3 isdischarged to gnd through an internal 1k in shutdown. 3 in34 in34 input voltage for ldo regulators 3 and 4. supply voltage range is from 1.7v to 5.5v. thissupply voltage must not exceed v in12 . connect a 4.7? or larger ceramic capacitor from in34 to ground. 4 out4 out4 output of regulator 4. bypass out4 with a 4.7? ceramic capacitor to gnd. out4 isdischarged to gnd through an internal 1k in shutdown. 5 en4 en4 enable input for regulator 4. drive en4 high or connect to in34 to turn on regulator 4. drive lowto turn off regulator 4 and reduce input quiescent current. 6 gnd gnd ground 7 ref ref reference output. bypass ref with a 0.01? ceramic capacitor to gnd. 8 out2 feedback input for regulator 2. connect out2 directly to the output of step-down regulator 2. fb2 feedback input for regulator 2. connect fb2 to the center of a resistor feedback dividerbetween the output of regulator 2 and ground to set the output voltage. see the setting the output voltages and voltage positioning section. 9 pgnd2 pgnd2 power ground for step-down regulator 2 10 lx2 lx2 inductor connection for regulator 2 11 in12 in12 input voltage for step-down regulators 1 and 2. supply voltage range is from 2.6v to 5.5v. thissupply voltage must not be less than v in34 . connect a 10? or larger ceramic capacitor from in12 to ground. 12 lx1 lx1 inductor connection for regulator 1 13 pgnd1 pgnd1 power ground for step-down regulator 1 14 out1 feed b ack inp ut for reg ul ator 1. c onnect ou t1 d i r ectl y to the outp ut of step - d ow n r eg ul ator 1. fb1 feedback input for regulator 1. connect fb1 to the center of a resistor feedback dividerbetween the output of regulator 1 and ground to set the output voltage. see the setting the output voltages and voltage positioning section. 15 en1 en1 e nab l e inp ut for reg ul ator 1. d r i ve e n 1 hi g h or connect to in 12 to tur n on step - d ow n r eg ul ator 1. d r i ve l ow to tur n off the r eg ul ator and r ed uce i np ut q ui escent cur r ent. 16 en2 en2 e nab l e inp ut for reg ul ator 2. d r i ve e n 2 hi g h or connect to in 12 to tur n on step - d ow n r eg ul ator 2. d r i ve l ow to tur n off the r eg ul ator and r ed uce i np ut q ui escent cur r ent. ep ep exposed paddle. connect to gnd, pgnd1, pgnd2, and circuit ground. downloaded from: http:///
max8667/max8668 1.5mhz dual step-down dc-dc converters with dual ldos and individual enables _______________________________________________________________________________________ 9 in refen uvlo ref and bias gnd in en out gnd inen gnd inen out gnd in34 1.7v to 5.5v in122.8v to 5.5v (2.6v to 5.5v) gnd lx1 lx2 ref out3 out4 pwron logic and enables en3en4 en1en2 pgnd2 out1(fb1) out2(fb2) fb fb pgnd1 en out1 out2 out3 out4 ldo ldo step-down step-down () are for the max8668 figure 1. functional diagram downloaded from: http:///
max8667/max8668 1.5mhz dual step-down dc-dc converters with dual ldos and individual enables 10 ______________________________________________________________________________________ detailed description the max8667/max8668 dual step-down converterswith dual low-dropout (ldo) linear regulators are intended to power low-voltage microprocessors or dsps in portable devices. they feature high efficiency with small external component size. the step-down out- puts are adjustable from 0.6v to 3.3v (max8668) or factory preset (max8667) with guaranteed output cur- rent of 600ma for out1 and 1200ma for out2. the 1.5mhz hysteretic-pwm control scheme allows for tiny external components and reduces no-load operating current to 100? (typ) with all regulators enabled. dual, low-quiescent-current, low-noise ldos operate down to 1.7v supply voltage. the max8667/max8668 have individual enable inputs for each output to facilitate any supply sequencing. step-down dc-dc regulators (out1, out2) step-down regulator architecture the max8667/max8668 step-down regulators are opti-mized for high-efficiency voltage conversion over a wide load range, while maintaining excellent transient response, minimizing external component size, and minimizing output voltage ripple. the dc-dc convert- ers (out1, out2) also feature an optimized on-resis- tance internal mosfet switch and synchronous rectifier to maximize efficiency. the max8667/ max8668 utilize a proprietary hysteretic-pwm control scheme that switches with nearly fixed frequency at up to 1.5mhz allowing for ultra-small external components. the step-down converter output current is guaranteed up to 600ma for out1 and 1200ma for out2. when the step-down converter output voltage falls below the regulation threshold, the error comparator begins a switching cycle by turning the high-side p-channel mosfet switch on. this switch remains on until the mini- mum on-time (t on ) expires and the output voltage is in regulation or the current-limit threshold (i limp_ ) is exceeded. once off, the high-side switch remains offuntil the minimum off-time (t off ) expires and the output voltage again falls below the regulation threshold.during this off period, the low-side synchronous rectifi- er turns on and remains on until either the high-side switch turns on or the inductor current reduces to the rectifier-off current threshold (i lxoff = 60ma typ). the internal synchronous rectifier eliminates the need for anexternal schottky diode. input supply and undervoltage lockout the input voltage range of step-down regulators out1 and out2 is 2.6v to 5.5v. this supply voltage must be greater than or equal to the ldo supply voltage (v in34 ). a uvlo circuit prevents step-down regulators out1and out2 from switching when the supply voltage is too low to guarantee proper operation. when v in12 falls below 2.4v (typ), out1 and out2 are shut down.out1 and out2 turn on and begin soft-start when v in12 rises above 2.5v (typ). soft-start when initially powered up, or enabled with en_, thestep-down regulators soft-start by gradually ramping up the output voltage. this reduces inrush current dur- ing startup. see the startup waveforms in the typical operating characteristics section. current limit the max8667/max8668 limit the peak inductor currentof the p-channel mosfet (i limp_ ). a valley current limit is used to protect the step-down regulators duringsevere overload and output short-circuit conditions. when the peak current limit is reached, the internal p-channel mosfet turns off and remains off until the output drops below regulation, the inductor current falls below the valley current-limit threshold, and the mini- mum off-time has expired. voltage positioning the out1 and out2 output voltages and voltage posi-tioning of the max8668 are set by a resistor network connected to fb_. with this configuration, a portion of the feedback signal is sensed on the switched side of the inductor, and the output voltage droops slightly as the load current is increased due to the dc resistance of the inductor. this output voltage droop is known as voltage positioning. voltage positioning allows the load regulation to be set to match the voltage droop during a load transient, reducing the peak-to-peak output volt- age deviation during a load transient, and reducing the output capacitance requirements. dropout as the input voltage approaches the output voltage, theduty cycle of the p-channel mosfet reaches 100%. in this state, the p-channel mosfet is turned on con- stantly (not switching), and the dropout voltage is the voltage drop due to the output current across the on- resistance of the internal p-channel mosfet (r pch ) and the inductor? dc resistance (r l ): ldo linear regulators (out3, out4) the max8667/max8668 contain two low-dropout linearregulators (ldos), out3 and out4. the ldo output voltages are factory preset, and each ldo supplies vi r r do load pch l =+ () downloaded from: http:///
max8667/max8668 1.5mhz dual step-down dc-dc converters with dual ldos and individual enables ______________________________________________________________________________________ 11 loads up to 300ma. the ldos include an internal refer-ence, error amplifier, p-channel pass transistor, and internal voltage-dividers. each error amplifier compares the reference voltage to the output voltage (divided by the internal voltage-divider) and amplifies the differ- ence. if the divided feedback voltage is lower than the reference voltage, the pass-transistor gate is pulled lower, allowing more current to pass to the outputs and increasing the output voltage. if the divided feedback voltage is too high, the pass-transistor gate is pulled up, allowing less current to pass to the output. input supply and undervoltage lockout the input voltage range of ldo regulators out3 andout4 is 1.7v to 5.5v. this supply voltage must be less than or equal to the voltage applied to in12 (v in34 v in12 ). an undervoltage lockout circuit turns off the ldo regula-tors when the input supply voltage is too low to guarantee proper operation. when v in34 falls below 1.5v (typ), out3 and out4 are shut down. out3 and out4 turn on and begin soft-start when v in34 rises above 1.6v (typ). soft-start when initially powered up, or enabled with en_, theldos soft-start by gradually ramping up the output voltage. this reduces inrush current during startup. the soft-start ramp time is typically 100? from the start ofthe soft-start ramp to the output reaching its nominal regulation voltage. current limit the out3 and out4 output current is limited to 375ma(min). if the output current exceeds the current limit, the corresponding ldo output voltage drops. dropout the maximum dropout voltage for the linear regulatorsis 250mv at 300ma load. to avoid dropout, make sure the in34 supply voltage is at least 250mv higher than the highest ldo output voltage. thermal-overload protection thermal-overload protection limits the total power dissi-pation in the max8667/max8668. thermal-protection circuits monitor the die temperature. if the die tempera- ture exceeds +160?, the ic is shut down, allowing the ic to cool. once the ic has cooled by 15?, the ic is enabled again. this results in a pulsed output during continuous thermal-overload conditions. the thermal- overload protection protects the max8667/max8668 in the event of fault conditions. for continuous operation, do not exceed the absolute maximum junction temper- ature of +150?. see the thermal considerations sec- tion for more information. in12 enx t pwron t pwron is the period required to enable from shutdown eny t en t en is the enable time for subsequent enable signals following the first enable enx, eny are any combination of en1?n4. outx outy figure 2. timing diagram downloaded from: http:///
max8667/max8668 1.5mhz dual step-down dc-dc converters with dual ldos and individual enables 12 ______________________________________________________________________________________ in34 1.7v to 5.5v lx1 lx2 out1 out2 input 2.8v to 5.5v out3out4 ref gnd in12 300ma 300ma en1en2 en3en4 out2 1.2a out1600ma pgnd2 pgnd1 c2 10 f c3 4.7 f c8 4.7 f c94.7 f c1 0.01 f l2 2.2 h l1 2.2 h c7 2.2 f c62.2 f max8667 figure 3. max8667 typical application circuit in34 lx1 lx2 fb1 fb2 input 2.6v to 5.5v out3out4 ref gnd in12 out3, 300ma out4, 300ma en1en2 en3en4 out2 0.6v to 3.3v, 1.2a out1 0.6v to 3.3v, 600ma pgnd1 pgnd2 c2 10 f c8 4.7 f c94.7 f c1 0.01 f l2 2.2 h l1 2.2 h c7 2.2 f for v out2 1.8v 4.7 f for v out2 > 1.8v c62.2 f r1r2 *c10, r5, and r6 are optional r6* c4 max8668 r3r4 r5* c5 c10* figure 4. max8668 typical application circuit downloaded from: http:///
max8667/max8668 1.5mhz dual step-down dc-dc converters with dual ldos and individual enables ______________________________________________________________________________________ 13 applications information setting the output voltages and voltage positioning the ldo output voltages of the max8667/max8668,and the step-down outputs of the max8667 are factory preset. see the selector guide to find the part number corresponding to the desired output voltages.the out1 and out2 output voltages of the max8668 are set by a resistor network connected to fb_ as shown in figure 5. with this configuration, a portion of the feedback signal is sensed on the switched side of the inductor (lx), and the output voltage droops slightly as the load current is increased due to the dc resis- tance of the inductor (dcr). this allows the load regu- lation to be set to match the voltage droop during a load transient (voltage positioning), reducing the peak- to-peak output-voltage deviation during a load tran- sient, and reducing the output capacitance requirements. for the simplest method of setting the output voltage, r6 is not installed. choose the value of r2 (a good starting value is 100k ? ), and then calculate the value of r1 as follows:where v fb is the feedback regulation voltage (0.6v). with the voltage set in this manner, the voltage posi-tioning depends only on the dcr, and the maximum output voltage droop is: setting the output voltages with reduced voltage positioning to obtain less voltage positioning than described in theprevious section, use the following procedure for set- ting the output voltages. the out1 and out2 output voltages and voltage positioning of the max8668 are set by a resistor network connected to fb_ as shown in figure 5. to set the output voltage (v out ), first select a value for r2 (a good starting value is 100k ? ). then calculate the value of r eq (the equivalent parallel resistance of r1 and r6) as follows:where v fb is the feedback-regulation voltage (0.6v). calculate the factor m based on the desired load-regu-lation improvement: where i out(max) is the maximum output current, dcr is the inductor series resistance, and ? v out(desired) is the maximum allowable droop in the output voltage at fullload. the calculated value for m must be between 1.1 and 2; m = 2 results in a 2x improvement in load regulation. now calculate the values of r1 and r6 as follows: the value of r1 should always be lower than the value of r6. power-supply sequencing the max8667/max8668 have individual enable inputsfor each regulator to allow complete control over the power sequencing. when all en_ inputs are low, the ic is in low-power shutdown mode, reducing the supply current to less than 1?. after one of the en_ inputs asserts high, the corresponding regulator begins soft- start after a delay of t en (see figure 2). the first output enabled from shutdown mode or initially powering upthe ic has a longer delay (t pwron ) as the ic exits the low-power shutdown mode. inductor selection the max8667/max8668 step-down converters operatewith inductors between 2.2? and 4.7?. low induc- tance values are physically smaller, but require faster switching, resulting in some efficiency loss. the induc- tor? dc current rating must be high enough to account rr m rr eq eq m m 1 6 1 = = m i dcr v out max out desired = () () ? r v v r eq out fb = ? ? ? ? ? ? 12 ? v dcr i out max out max () () = rr v v out fb 12 1 = ? ? ? ? ? ? l1 dcr lx_fb_ out esr c6 r load r1 r6 (optional) r2 c4 figure 5. max8668 feedback network downloaded from: http:///
max8667/max8668 1.5mhz dual step-down dc-dc converters with dual ldos and individual enables 14 ______________________________________________________________________________________ for peak ripple current and load transients. the step-down converter? unique architecture has minimal cur- rent overshoot during startup and load transients and in most cases, an inductor capable of 1.3x the maximum load current is acceptable. for output voltages above 2v, when light-load efficiency is important, the minimum recommended inductor is 2.2?. for optimum voltage-positioning load transients, choose an inductor with dc series resistance in the 50m ? to 150m ? range. for higher efficiency at heavy loads (above 200ma) and minimal load regulation,keep the inductor resistance as small as possible. for light-load applications (up to 200ma), higher resistance is acceptable with very little impact on performance. capacitor selection input capacitors the input capacitor for the step-down converters (c2 infigures 3 and 4) reduces the current peaks drawn from the battery or input power source and reduces switch- ing noise in the ic. the impedance of c2 at the switch- ing frequency should be very low. surface-mount ceramic capacitors are a good choice due to their small size and low esr. make sure the capacitor main- tains its capacitance over temperature and dc bias. ceramic capacitors with x5r or x7r temperature char- acteristics generally perform well. a 10? ceramic capacitor is recommended. a 4.7? ceramic capacitor is recommended for the ldo input capacitor (c3 in figure 3). step-down output capacitors the step-down output capacitors (c6 and c7 in figures3 and 4) are required to keep the output-voltage ripple small and to ensure regulation loop stability. thesecapacitors must have low impedance at the switching frequency. surface-mount ceramic capacitors are a good choice due to their small size and low esr. make sure the capacitor maintains its capacitance over tem- perature and dc bias. ceramic capacitors with x5r or x7r temperature characteristics generally perform well. the output capacitance can be very low. for most appli- cations, a 2.2? ceramic capacitor is sufficient. for c7 of the max8668, a 2.2? (v out2 1.8v) or a 4.7? (v out2 > 1.8v) ceramic capacitor is recommended. for opti-mum load-transient performance and very low output rip- ple, the output capacitor value in ? should be equal to or greater than the inductor value in ?. feed-forward capacitor the feed-forward capacitors on the max8668 (c4 and c5 in figure 4) set the feedback loop response, control the switching frequency, and are critical in obtaining the best efficiency possible. small x7r and c0g ceramic capacitors are recommended. for out1, calculate the value of c4 as follows: c4 = 1.2 x 10 -5 (s/v) x (v out / r1) for out2, calculate the value of c5 and c10 as fol- lows: c ff = 1.2 x 10 -5 (s/v) x (v out / r3) c ff = c5 + (c10 / 2) (c10 / c5) + 1 = (v out / v fb ), where v fb is 0.6v. rearranging the formulas: c10 = 2 x c ff x (v out - v fb )/(v out + v fb ) c5 = c ff ?(c10 / 2) manufacturer inductor l (?) r l (m ) current rating (a) l x w x h (mm) fdk mipf2016 2.2 110 1.1 2.0 x 1.6 x 1.0 fdk mipf2520d 2.2 80 1.3 2.5 x 2.0 x 1.0 lqh32cn2r2m5 2.2 97 0.79 3.2 x 2.5 x 1.55 murata lqm31p 2.2 220 0.9 3.2 x 1.6 x 0.95 sumida cdrh2d09 2.2 120 0.44 3.2 x 3.2 x 1.0 tdk glf251812t 2.2 200 0.6 2.5 x 1.8 x 1.35 toko d2812c 2.2 140 0.77 2.8 x 2.8 x 1.2 toko mdt2520-cr 2.2 80 0.7 2.5 x 2.0 x 1.0 tpc series 2.2 55 1.8 4.0 x 4.0 x 1.1 wurth tpc series 4.7 124 1.35 4.0 x 4.0 x 1.1 taiyo yuden cb2518t 2.2 90 0.51 2.5 x 1.8 x 2.0 table 1. recommended inductors downloaded from: http:///
max8667/max8668 1.5mhz dual step-down dc-dc converters with dual ldos and individual enables ______________________________________________________________________________________ 15 c10 is needed if v out > 1.5v or v in12 can be less than v out / 0.65. ldo output capacitor and stability connect a 4.7? ceramic capacitor between out3 andgnd, and a second 4.7? ceramic capacitor from out4 to gnd. for a constant loading above 10ma, the output capacitors can be reduced to 2.2?. the equiv- alent series resistance (esr) of the ldo output capaci- tors affects stability and output noise. use output capacitors with an esr of 0.1 ? or less to ensure stable operation and optimum transient response. surface-mount ceramic capacitors have very low esr and are commonly available. connect these capacitors as close as possible to the ic? pins to minimize pcb trace inductance. thermal considerations the maximum package power dissipation of themax8667/max8668 is 1667mw. make sure the power dissipated by the max8667/max8668 does not exceed this rating. the total ic power dissipation is the sum of the power dissipation of the four regulators: estimate the out1 and out2 power dissipations as follows: where r l is the inductor? dc resistance, and is the efficiency (see the typical operating characteristics section).calculate the out3 and out4 power dissipations as follows: the maximum junction temperature of the max8667/max8668 is +150?. the junction-to-case thermal resistance ( jc ) of the max8667/max8668 is 6.9?/w. when mounted on a single-layer pcb, the junction toambient thermal resistance ( ja ) is about 64?/w. mounted on a multilayer pcb, ja is about 48?/w. calculate the junction temperature of themax8667/max8668 as follows: where t a is the maximum ambient temperature. make sure the calculated value of t j does not exceed the +150? maximum. pcb layout high switching frequencies and relatively large peakcurrents make pcb layout a very important aspect of design. good design minimizes excessive emi on the feedback paths and voltage gradients in the ground plane, both of which can result in instability or regula- tion errors. connect the input capacitors as close as possible to the in_ and pgnd_ pins. connect the inductor and output capacitors as close as possible to the ic and keep the traces short, direct, and wide. the feedback network traces are sensitive to inductor magnetic field interference. route these traces away from the inductors and noisy traces such as lx. keep the feedback components close to the fb_ pin. connect gnd and pgnd_ to the ground plane. connect the exposed paddle to the ground plane with one or more vias to help conduct heat away from the ic. refer to the max8668 evaluation kit for a pcb layout example. ttp jadja =+ pi v v d out in out 443 4 4 = () pi v v d out in out 333 4 3 = () pi v d out out 22 2 1 = pi v d out out 11 1 1 = ppppp ddddd =+++ 1234 downloaded from: http:///
max8667/max8668 1.5mhz dual step-down dc-dc converters with dual ldos and individual enables 16 ______________________________________________________________________________________ chip information process: bicmos ordering information (continued) all max8667/max8668 parts are in a 16-pin, thin qfn, 3mm x 3mm package and operate in the -40? to = +85? extended temperature range. + denotes a lead-free package. part pkg code top mark max8667etehr+ t1633-4 afj max8667etejs+ t1633-4 afq max8668 etea+ t1633-4 aer max8668etep+ t1633-4 afk MAX8668ETEQ+ t1633-4 afr max8668etet+ t1633-4 afs max8668eteu+ t1633-4 afl max8668etev+ t1633-4 aft max8668etew+ t1633-4 afu max8668etex+ t1633-4 afv selector guide part out1 (v) out2 (v) out3 (v) out4 (v) max8667eteaa+ 1.20 1.80 2.80 2.80 max8667eteab+ 1.20 1.80 2.85 2.85 max8667eteac+ 1.20 1.80 1.20 1.20 max8667etecq+ 1.60 1.80 2.80 1.20 max8667etehr+ 1.80 1.20 2.60 2.80 max8667etejs+ 1.30 1.30 3.30 2.70 max8668etea+ adj adj 2.80 2.80 max8668etep+ adj adj 3.30 1.80 MAX8668ETEQ+ adj adj 2.80 1.20 max8668etet+ adj adj 3.30 3.30 max8668eteu+ adj adj 3.30 2.80 max8668etev+ adj adj 3.30 2.50 max8668etew+ adj adj 3.30 3.00 max8668etex+ adj adj 2.80 1.80 downloaded from: http:///
max8667/max8668 1.5mhz dual step-down dc-dc converters with dual ldos and individual enables ______________________________________________________________________________________ 17 package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation go to www.maxim-ic.com/packages .) 12x16l qfn thin.eps 0.10 c 0.08 c 0.10 m c a b d d/2 e/2 e a1 a2 a e2 e2/2 l k e (nd - 1) x e (ne - 1) x e d2 d2/2 b l e l c l e c l l c l c package outline 21-0136 2 1 i 8, 12, 16l thin qfn, 3x3x0.8mm marking aaaa downloaded from: http:///
max8667/max8668 1.5mhz dual step-down dc-dc converters with dual ldos and individual enables maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 18 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2007 maxim integrated products is a registered trademark of maxim integrated products. inc. package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation go to www.maxim-ic.com/packages .) exposed pad variations codes pkg. t1233-1 min. 0.95 nom. 1.10 d2 nom. 1.10 max. 1.25 min. 0.95 max. 1.25 e2 12 n k a2 0.25 ne a1 nd 0 0.20 ref - - 3 0.02 3 0.05 l e e 0.45 2.90 b d a 0.20 2.90 0.70 0.50 bsc. 0.55 3.00 0.65 3.10 0.25 3.00 0.75 0.30 3.10 0.80 16 0.20 ref 0.25 - 0 4 0.02 4 - 0.05 0.50 bsc. 0.30 2.90 0.40 3.00 0.20 2.90 0.70 0.25 3.00 0.75 3.10 0.50 0.80 3.10 0.30 pkg ref. min. 12l 3x3 nom. max. nom. 16l 3x3 min. max. 0.35 x 45 pin id jedec weed-1 t1233- 3 1.10 1.25 0.95 1.10 0.35 x 45 1.25 weed-1 0.95 t1633f-3 0.65 t1633-4 0.95 0.80 0.95 0.65 0.80 1.10 1.25 0.95 1.10 0.225 x 45 0.95 weed-2 0.35 x 45 1.25 weed-2 t1633-2 0.95 1.10 1.25 0.95 1.10 0.35 x 45 1.25 weed-2 package outline 21-0136 2 2 i 8, 12, 16l thin qfn, 3x3x0.8mm weed-1 1.25 1.10 0.95 0.35 x 45 1.25 1.10 0.95 t1233-4 t1633fh-3 0.65 0.80 0.95 0.225 x 45 0.65 0.80 0.95 weed-2 notes: 1. dimensioning & tolerancing conform to asme y14.5m-1994. 2. all dimensions are in millimeters. angles are in degrees. 3. n is the total number of terminals. 4. the terminal #1 identifier and terminal numbering convention shall conform to jesd 95-1 spp-012. details of terminal #1 identifier are optio nal, but must be located within the zone indicated. the terminal #1 identifier may be either a mold or marked feature. 5. dimension b applies to metallized terminal and is measured between 0.20 mm and 0.25 mm from terminal tip. 6. nd and ne refer to the number of terminals on each d and e sid e respectively. 7. depopulation is possible in a symmetrical fashion. 8. coplanarity applies to the exposed heat sink slug as well as the terminals . 9. drawing conforms to jedec mo220 revision c. 10. marking is for package orientation reference only. 11. number of leads shown are for reference only. 12. warpage not to exceed 0.10mm. 0.25 0.30 0.35 2 0.25 0 0.20 ref - - 0.02 0.05 0.35 8 2 0.55 0.75 2.90 2.90 3.00 3.10 0.65 bsc. 3.00 3.10 8l 3x3 min. 0.70 0.75 0.80 nom. m ax. tq833-1 1.25 0.25 0.70 0.35 x 45 weec 1.25 0.70 0.25 t1633-5 0.95 1.10 1.25 0.35 x 45 weed-2 0.95 1.10 1.25 revision history pages changed at rev 1: 1, 12, 14, 18 downloaded from: http:///

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